Computer Architecture

BOOKS

• The Complexity of Simple Computer Architectures
  Silvia M. Müller, Wolfgang Paul, 1995

• Computer Architecture: Complexity and Correctness
  Silvia M. Müller, Wolfgang Paul, Further excerpts available upon request. 2000

PAPERS

• A Dual Mode IEEE Multiplier
  Guy Even, Silvia M. Müller, Peter Michael Seidel, 1997

• On the design of IEEE compliant floating point units
  Guy Even, Wolfgang Paul, 1997

• A Hardware Scheduler for Controlling Variable Latency Functional Units
  Silvia M. Müller, 1999

• On the Scheduling of Variable Latency Functional Units.
  Silvia M. Müller, 1999

• Proving the Correctness of a Complete Microprocessor
  Christian Jacobi, Daniel Kröning, 2000

• On the Complexity of Booth Recoding
  Wolfgang Paul, Peter Michael Seidel, 1998

• High-Speed Redundant Reciprocal Approximation
  Peter Michael Seidel, 1998

• How Many Logic Levels Does Floating-point Addition Require?
  Peter Michael Seidel, Guy Even, 1998

• How to half the latency of IEEE compliant floating-point multiplication.
  Peter Michael Seidel, 1998

• A comparison of three different rounding algorithms for floating-point multiplication
  Guy Even, Peter Michael Seidel, 1999

• High-Speed Redundant Reciprocal Approximation
  Peter Michael Seidel, 1999

• A comparison of three different rounding algorithms for floating-point multiplication
  Guy Even, Peter Michael Seidel, 2000

• A dual mode IEEE multiplier
  Guy Even, Silvia M. Müller, Peter Michael Seidel, 2000

• Formal Verification of the VAMP Floating Point Unit
  Christoph Berg, Christian Jacobi, 2001

• Formal Verification of a Theory of IEEE Rounding
  Christian Jacobi, 2001

• Formal Verification of the VAMP Microprocessor (Project Status)
  Christoph Berg, Sven Beyer, Christian Jacobi, Daniel Kröning, Dirk Leinenbach, 2002

Master/Phd Thesis

• On the Design of IEEE Compliant Floating-Point Units and their Quantitative Analysis.
  Peter Michael Seidel, 1999