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| zu den Examensarbeiten | |||
| Ihre Anfrage lieferte 223 Ergebnisse. | |||
| Jacobi, Christian |  |
BibTeX | |
| Formal Verification of Complex Out-of-order Pipelines by Combining Model-Checking and Theorem-Proving. | |||
| In Computer Aided Verification (CAV 02), | |||
| volume 2404 of LNCS, pages 309-323, Springer, 2002. | |||
| Beyer, S. and Jacobi, C. and Kroening, D. and Leinenbach, D. | |
BibTeX | |
| Correct Hardware by Synthesis from PVS. | |||
| 2002. | |||
| unpublished, available at http://www-wjp.cs.uni-saarland.de/publikationen/BJKL02.pdf | |||
| Klein, M. and Paul, W. J. and Preiß, J. and Renz, G. and Scholl, M. | |
EE | BibTeX |
| Optical Interconnect Between Cache and Main Memory. | |||
| volume 33 of LaserOpto, pages 86--89, AT-Fachverlag Stuttgart, 2001. | |||
| Kröning, D. and Paul, W.J. | EE | BibTeX | |
| Automated Pipeline Design. | |||
| In 38th Design Automation Conference, | |||
| Las Vegas, Nevada | |||
| pages 810--815, ACM Press, 2001. | |||
| Berg, C. and Jacobi, C. and Kröning, D. | |
BibTeX | |
| Formal Verification of a Basic Circuits Library. | |||
| In Proc. of the IASTED International Conference on Applied Informatics, Innsbruck (AI 2001), | |||
| Innsbruck, Austria | |||
| ACTA Press, 2001. | |||
| Jacobi, Christian | |
BibTeX | |
| Formal Verification of a Theory of IEEE Rounding. | |||
| In Boulton, R.J. and Jackson, P.B., editors, TPHOLs 2001: Supplemental Proceedings, | |||
| Edinburgh, UK | |||
| Informatics Research Report EDI-INF-RR-0046, 2001. | |||
| Berg, C. and Jacobi, C. | |
BibTeX | |
| Formal Verification of the {VAMP} Floating Point Unit. | |||
| In Proc.\ 11th Advanced Research Working Conference on Correct Hardware Design and Verification Methods ({CHARME}), | |||
| volume 2144 of LNCS, pages 325-339, Springer, 2001. | |||
| Jacobi, Christian | |
BibTeX | |
| Formal Verification of a Theory of {IEEE} Rounding. | |||
| In Richard J. Boulton and Paul B. Jackson, editors, {TPHOLs} 2001: Supplemental Proceedings. Informatics Research Report EDI-INF-RR-0046, Univ. Edinburgh, UK, | |||
| 2001. | |||
| Hillebrand, Mark and Schuerger, Thomas and Seidel, Peter-M. | EE | BibTeX | |
| How to Halve Wire Lengths in the Layout of Cyclic Shifters. | |||
| In Proceedings of the IEEE International Conference on VLSI Design 2001, | |||
| pages 339-344, IEEE Computer Society Press, 2001. | |||
| Hillebrand, Mark and Schuerger, Thomas and Seidel, Peter-M. | EE | BibTeX | |
| Reducing Wire Lengths in the Layout of Cyclic Shifters. | |||
| In IEICE Transactions, Special Section on VLSI and CAD Algorithms, | |||
| pages 2714-2721, 2001. | |||
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