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Alkassar, Eyad and Hillebrand, Mark A. and Leinenbach, Dirk and Schirmer, Norbert W. and Starostin, Artem EE BibTeX
The Verisoft Approach to Systems Verification.
In Natarajan Shankar and Jim Woodcock, editors, 2nd IFIP Working Conference on Verified Software: Theories, Tools, and Experiments (VSTTE'08),
volume 5295 of LNCS, pages 209--224, Springer, 2008.
 
Starostin, Artem and Tsyban, Alexandra   EE BibTeX
Verified Process-Context Switch for C-Programmed Kernels.
In Natarajan Shankar and Jim Woodcock, editors, 2nd IFIP Working Conference on Verified Software: Theories, Tools, and Experiments (VSTTE'08),
volume 5295 of LNCS, pages 240--254, Springer, 2008.
 
Alkassar, Eyad and Hillebrand, Mark A. EE BibTeX
Formal Functional Verification of Device Drivers.
In Natarajan Shankar and Jim Woodcock, editors, 2nd IFIP Working Conference on Verified Software: Theories, Tools, and Experiments (VSTTE'08),
volume 5295 of LNCS, pages 225--239, Springer, 2008.
 
Knapp, S. and Paul, W. J. EE BibTeX
Pervasive Verification of Distributed Real Time Systems.
In M. Broy, J. Grünbauer, T. Hoare, editors, Software System Reliability and Security,
NATO Security Through Science Series. Sub-Series: Information and Communication Vol.9, IOS Press, 2007.
ISBN 978-1-58603-731
 
Alkassar, E. and Hillebrand, M. and Knapp, S. and Rusev, R. and Tverdyshev, S. EE BibTeX
Formal Device and Programming Model for a Serial Interface.
In B. Beckert, editors, Proceedings, 4th International Verification Workshop (VERIFY), Bremen, Germany,
pages 4--20, CEUR-WS Workshop Proceedings, 2007.
 
Hillebrand, M. A. and Paul, W. J.   EE BibTeX
On the Architecture of System Verification Environments.
In Karen Yorav, editors, Haifa Verification Conference 2007, October 23-25, 2007, Haifa, Israel,
volume 4899 of LNCS, pages 153--168, Springer, 2007.
 
Daum, Matthias   EE BibTeX
Reasoning on Data-Parallel Programs in Isabelle/HOL.
In Tews, H., editors, C/C++ Verification Workshop, technical report ICIS--R07015,
pages 17-28, Radboud University Nijmegen, 2007.
 
Beyer, S. and Jacobi, C. and Kröning, D. and Leinenbach, D. and Paul, W.J.   EE BibTeX
Putting it all together - Formal Verification of the VAMP.
In STTT Journal, Special Issue on Recent Advances in Hardware Verification,
Springer, 2006.
 
Knapp, S. and Paul, W. J.   EE BibTeX
Realistic Worst Case Execution Time Analysis in the Context of Pervasive System Verification.
In Program Analysis and Compilation, Theory and Practice: Essays Dedicated to Reinhard Wilhelm on the Occasion of his 60th Birthday,
Dagstuhl
volume 4444 of LNCS, pages 53--81, Springer, 2006.
 
Jacobi, C. and Berg, C.   EE BibTeX
Formal Verification of the VAMP Floating Point Unit.
In Formal Methods in System Design,
pages 227-266, Springer Netherlands, 2005.
 
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