Schmaltz' Publications

International Conferences (peer reviewed on the full paper)

1. J. Schmaltz: ``A Formal Model of Lower System Layer'', in Proc. of Formal Methods in Computer-Aided Design (FMCAD'06), pp 191-192, San Jose, CA, USA, November, 2006. IEEE/ACM Press
2. J. Schmaltz and D. Borrione: ``A Generic Network on Chip Model'', in Proc. of Theorem Proving in Higher Order Logics (TPHOLS'05), LNCS 3603,pp 310-325,, Springer-Verlag, Oxford, UK, August 22-25, 2005.
3. J. Schmaltz and D. Borrione: ``A Functional Approach to the Formal Specification of Networks on Chip'', in Proc. of Formal Methods in Computer-Aided Design (FMCAD'04), LNCS 3312, pp 52-66, Springer-Verlag, Austin, Texas, USA, November 14-17, 2004.
4. G. Al Sammane, J. Schmaltz, D. Toma, P. Ostier and D. Borrione, Theosim: ``Combining Symbolic Simulation and Theorem Proving for Hardware Verification'', in Proc. of the 17th Symposium on Integrated Circuits and System Design (SBCCI'04), Porto de Galinhas, Pernambuco, Brazil, September 7-11, 2004.
5. G. Al Sammane, J. Schmaltz and D. Borrione: ``Formal Verification of On-Chip Networking'', in 1st International Conference on Information & Communication Technologies : from Theory to Applications (ICTTA'04), Damascus, Syria, April 19-23, 2004.
6. G. Al Sammane, D. Toma, J. Schmaltz, P. Ostier and D. Borrione: ``Constrained Symbolic Simulation with Mathematica and ACL2'', in Proceedings of the 12th Advanced Research Conference on Correct Hardware Design and Verification Methods (CHARME'03), LNCS 2860, Springer-Verlag, L'aquila, Italy, October 21-24, 2003.

International Workshops (peer reviewed on the full paper)

1. J. Schmaltz and D. Borrione: ``Towards a Formal Theory of Communication Architecture in the ACL2 Logic'', in Proceedings of the 6th International Workshop on the ACL2 Theorem Prover and its Applications (ACL2'06), pp 47-60, Seattle, WA, August 15-16, 2006, USA.
2. J. Schmaltz and D. Borrione: ``A Functional Specification and Validation Model for Networks on Chip in the ACL2 Logic'', in Proceedings of the 5th International Workshop on the ACL2 Theorem Prover and its Applications ( ACL2'04 ), Austin, Texas, November 18-19, 2004, USA.
3. J. Schmaltz and D. Borrione: ``Validation of a Parameterized Bus Architecture'', in Proceedings of the 4th International Workshop on the ACL2 Theorem Prover and its Applications ( ACL2'03 ), Boulder, Colorado, July 13-14, 2003, USA.
4. G. Al Sammane, D. Borrione, P. Ostier, J. Schmaltz and D. Toma: ``Combining Mathematica for the Symbolic Simulation of Digital Systems'', Proceedings of the 4th International Workshop on the ACL2 Theorem Prover and its Applications ( ACL2'03 ), Boulder, Colorado, July 13-14, 2003, USA.
5. J. Schmaltz and D. Borrione: ``Formalization and Verification of the AMBA AHB Communication Architecture Using the ACL2 Theorem Prover'', in Proceedings of IEEE Workshop on Design and Diagnostics of Electronic Circtuits and Systems (DDECS'03), pp 93-100, Poznan, April 14-16, 2003, Poland.

Research Reports

1. J. Schmaltz, G. Al Sammane and D.Borrione:"Design and Formal Verification of Networks on Chip", Research Report, TIMA-RR--05/12-01--FR, (26 pages). [pdf]
2. J. Schmaltz: "Functional Specification and Validation of the Octagon Network On Chip Using theACL2 Theorem Prover" Research Report, TIMA--RR-04-01-02--FR, (96 pages). [pdf]
3. G. Al Sammane, D. Toma, J. Schmaltz, P.Ostier and D. Borrione:"Constrained SymbolicSimulation with Mathematica and ACL2", Research Report, TIMA--RR-03/07-03--FR, 2003 (long version of the CHARME'03 paper), (17 pages). [pdf]
4. J. Schmaltz and D. Borrione: "Formalization and Verification of the AMBA AHB CommunicationArchitecture Using the ACL2 Theorem Prover", Research Report, TIMA--RR-03/07-03--FR, 2003 (long version of the DDECS'03 paper), (14 pages). [pdf]