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This is the counter part of the lecture ‚System Architecture‘ for multicore systems.
It builds on the material of lectures ’System Architecture' and on the lecture ‚Computer Architecture 1‘. Although we will summarize the material that we use, a student of this class should have heard at least one of these lectures or reserve substantial amounts of time for reading up on this material.
The class has three portions:
- Hardware: the pipelined multi core processor from the computer architecture class is augmented with store buffers and operating system support: interrupts, multi level address translation, nested page tables, inter processor interrupts.
- Structured Parallel C: A theory of store buffer reduction and order reduction is presented. This permits to define the semantics of structured parallel C (which uses a sequentially consistent memory model without store buffers) and to extend the C-compiler from the ‚System Achitecture‘ class for the translation of multiple C-threads
operating on a shared global memory and heap.
- Hypervisor: In a nutshell a hypervisor is a kernel, whose guests are operating systems together with their user processes. Thus, in contrast to ordinary kernels the guests can run in translated mode. This is supported by memory management unit (MMUs) with nested page tables. Building on the kernel from the ‚System Architecture‘ lecture, we will outline the construction of a hypervisor for a multicore machine and its correctness proof.
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- Lectures will be held on Tuesday, 14:00-16:00 and Friday, 10:00-12:00 in Lecture Hall III of building E1.3. First lecture: 20th Oct 2015
- Registration for the lecture is mandatory and open until the 13th November (see link above)
- Also register for the exam in the HISPOS system!
- Every Friday an exercise sheet will be handed out. There will be 12 exercise sheets in total.
- We will offer two groups of weekly tutorial in Room 328, Building E 1 3 to cover the lecture and exercise sheets. Group A: Wednesday 12:00-14:00 Jonas Donia; Group B: Tuesday 10:00-12:00 Shahd Zahran.
- Office hours of the teaching assistent: on Fridays 13:00-15:00 (building E1.3, room 306).
- Exam Prerequisites:
In order to be admitted to the exam you have to achieve 50% of all exercise points.
In addition each student has to present at least two exercise solutions in the tutorial.
- Exam:
You have to pass one oral exam. The date of the exam will be fixed in class.
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- The tutorials in the first week of 2016 are canceled.
- The oral exam takes place on Friday, Feb 12th. Please make sure you get a time slot! Do not forget to register for the exam in HISPOS as well!
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