Within this practical core lecture, we will deal with the specification, implementation, correctness, and evaluation of computer hardware.
The following topics will be covered:

• Basics: combinational & clocked circuits
  
• MIPS instruction set architecture
  
• MIPS implementation: sequential, pipelined implementation, improved pipelined implementation (forwarding, branch prediction)
  
• Caches and memory: direct mapped caches, associative caches, single-port RAM, multi-port RAM
  
• Caches and shared memory for multicore systems: MOESI protocol specification, implementation, and correctness proof
  
• Multi-core MIPS processor: specification, implementation and correctness
  
• Virtual memory support