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Within this practical core lecture, we will deal with the specification, the implementation, the correctness, and the evaluation of computer hardware.

The following topics will be covered:
- Basics: Combinational circuits (without register), Clocked circuits (with registers)
- DLX instruction set architecture
- DLX implementation: Sequential, Pipelined implementation, Improved pipelined implementation (forwarding, branch prediction)
- Memory system with caches: In order to gain fast memory accesses, a memory system with caches will be presented.
- Virtual memory support: A virtual memory support is essential for multitasking operating systems; topics like memory management units are covered.
- I/O Device support
A support for I/O devices is essential for user interaction, networking, or data storage.
 
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Course starts at Monday, October 16th.

Exercise groups:
Please register for a exercise group in the exercise section. Deadline: Sunday, 29.10.06

Exams:
We will have a midterm exam at December, 11th and a end-of-term exam at February, 19th. The requirements to write the exams and to pass the course will be stated on the first exercise sheet.

Lecture notes available in the layouts section.

Exercise group assignment in the groups section.
Exercises start at Tuesday, October 31th.

Update of the group assignment in order to keep your desired groups together in which you have handed in the first exercise sheet.

List of admitted students for the final exam is online in the exam section