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| Ihre Anfrage lieferte 18 Ergebnisse. |
| Hillebrand, Mark |
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| Address Spaces and Virtual Memory: Specification, Implementation, and Correctness. | | | Dissertation, Saarland University, Saarbrücken, 2005. | | |
| Preiß, Jochen |
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| Complexity and Correctness of a Super-Pipelined Processor. | | | Dissertation, Saarland University, Saarbrücken, 2005. | | |
| Alkassar, Eyad |
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BibTeX |
| Constructing a Formal Framework for Modeling and Verifying a Real Operating System. | | | Masterarbeit, Universität des Saarlandes, 2005. | | |
| Leinenbach, Dirk |
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| Implementierung eines maschinell verifizierten Prozessors. | | | Diplomarbeit, Universität des Saarlandes, 2002. | | |
| Jacobi, Christian |
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BibTeX |
| Formal Verification of a Fully IEEE Compliant Floating Point Unit. | | | Doktorarbeit, Saarland University, 2002. | | |
| Meyer, Carsten |
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| Entwicklung einer Laufzeit-Umgebung für den VAMP-Prozessor. | | | Diplomarbeit, Universität des Saarlandes, 2002. | | |
| Kroening, Daniel |
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| Formal Verification of Pipelined Microprocessors. | | | Doktorarbeit, Saarland University, 2001. | | |
| Berg, Christoph |
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BibTeX |
| Formal verification of an IEEE floating point adder. | | | Diplomarbeit, Saarland University, 2001. | | | zurück
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