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| Kovalev, M. and Mueller, s.M. and Paul, W.J. |
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| A Pipelined Multi-core MIPS Machine - Hardware Implementation and Correctness Proof. | | Springer, 2014. | | ISBN 978-3-319-13905-0 | | |
| Endres, E. and Muller, C. and Shadrin, A. and Tverdyshev, S. |
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| Towards the Formal Verification of a Distributed Real-Time Automotive System. | | In Cesar Munoz, editors, Second NASA Formal Methods Symposium
NFM 2010, | | pages 212-217, NASA, 2010. | | unpublished, available at http://www-wjp.cs.uni-saarland.de/publikationen/Endres-NFM2010.pdf | | |
| Beyer, S. and Jacobi, C. and Kröning, D. and Leinenbach, D. and Paul, W.J. |
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| Putting it all together - Formal Verification of the VAMP. | | In STTT Journal, Special Issue on Recent Advances in Hardware Verification, | | Springer, 2006. | | |
| Jacobi, C. and Berg, C. |
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| Formal Verification of the VAMP Floating Point Unit. | | In Formal Methods in System Design, | | pages 227-266, Springer Netherlands, 2005. | | |
| Dalinger, I. and Hillebrand, M. and Paul, W. |
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| On the Verification of Memory Management Mechanisms. | | In Borrione, D. and Paul, W., editors, CHARME 2005, | | LNCS, Springer, 2005. | | |
| Ayewah, N. and Beyer, S. and Kikkeri, N. and Seidel, P.-M. |
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| Challenges in the Formal Verification of Complete State-of-the-Art Processors. | | In International Conference on Computer Design, | | San Jose | | 2005. | | |
| Beyer, S. and Jacobi, C. and Kröning, D. and Leinenbach, D. and Paul, W.J. |
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| Instantiating uninterpreted functional units and memory system: functional verification of the VAMP. | | In Geist, D. and Tronci, E., editors, CHARME 2003, | | volume 2860 of LNCS, pages 51-65, Springer, 2003. | | |
| Berg, C. and Beyer, S. and Jacobi, C. and Kröning, D. and Leinenbach, D. |
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| Formal Verification of the VAMP Microprocessor (Project Status). | | In Charatonik, Witold and Ganzinger, Harald, editors, Symposium on the Effectiveness of Logic in Computer Science (ELICS02), | | pages 31-36, Max-Planck-Institut für Informatik, 2002. | | |
| Jacobi, Christian |
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BibTeX |
| Formal Verification of Complex Out-of-order Pipelines
by Combining Model-Checking and Theorem-Proving. | | In Computer Aided Verification (CAV 02), | | volume 2404 of LNCS, pages 309-323, Springer, 2002. | | |
| Beyer, S. and Jacobi, C. and Kroening, D. and Leinenbach, D. |
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BibTeX |
| Correct Hardware by Synthesis from PVS. | | 2002. | | unpublished, available at http://www-wjp.cs.uni-saarland.de/publikationen/BJKL02.pdf | | | weiter
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